The present invention relates in general to real-time statistical analysis of testing of a manufactured product lot split among multiple testers. More particularly, the invention relates to comparing the results of two or more testers for an entire lot of semiconductor wafers using real-time statistical analysis of test data obtained during testing.
No manufacturing process, even at concerns such as Texas Instruments, is so perfect that all products are completely alike. There are generally variations that may be caused by a great number of small, uncontrollable factors, and must, therefore, be regarded as a chance variation.
In general, however, it is desirable to ensure that manufactured articles possess characteristics that fall within a required range of values. Such characteristics may define the operating conditions and performance characteristics of the device necessary for compliance verification. For this purpose, it is useful to make tests of the hypothesis that the products possess the required characteristics. If testing is done after an entire lot has been produced, for example, a lot of 24 semi-conductor wafers, each wafer containing hundreds, or even hundreds of thousands of circuits, the testing will reveal how closely the lot of wafers approach the desired characteristics. In this way, products that do not meet rigorous testing standards can be identified and intercepted before they are passed on to customers and production problems can be addressed. This type of testing is common in the art.
One problem with such a testing approach is that considerable time and testing resources may be used in testing a lot that is ultimately rejected. It would be advantageous in terms of cost and efficiency to identify problem products within a lot as early as possible in the testing cycle. A further problem is encountered, however, if the testing process is stopped too liberally. Stopping the testing process even though it is progressing properly is known as a Type I error. Not stopping a process even though something is amiss is known as a Type II error. Thus, either erroneously interrupting or failing to interrupt testing of a lot of manufactured articles can present problems in the art. These and other problems can be traced to potential invalidity of test data and the relative differences in test results obtained for one tester versus another tester.
With reference to the manufacturing of semiconductor wafers, it is well known in the industry to use electronic testers that have fingers that touch bond pads o f a chip. Typically, anywhere from 100 to 1,000 bond pads are touched by the fingers, such that a program is able to access the memory cells of the semiconductor device in order to analyze its performance. Since a lot of semiconductor wafers is split among testers, randomization ensures that wafers from a contaminated lot are split among testers in a fairly even way. Therefore, by the time the lot reaches the tester, any anomalies in the test data can be attributed to failures in a tester or decreased performance by a particular tester.
Thus, since post-process randomization ensures that contaminated lots are split among multiple testers, a ready means of ensuring tester performance and identifying problems is required. One prior method of verifying tester performance is known as ANOVA (analysis of variance). ANOVA is technique that uses analysis of variance to statistically compare the means among groups of test data. In order for ANOVA to be effective, it is usually required to be run for an entire manufacturing cycle in order to collect enough test data for the ANOVA analysis. Moreover, with the ANOVA procedure, a single statistical quantity for each split of a lot is not obtained, making it difficult to isolate any particular tester in terms of its performance versus a required standard or threshold. Therefore, with the ANOVA process, one only obtains the difference between one tester and another, and not an actual figure for each individual tester. This leaves the technician without confidence that any one tester is operating within a certain tolerance or that a particular tester has a problem.
Another disadvantage of prior art tester verification processes is the inability to identify problems in real-time. Typically, an entire testing cycle has to be completed before sufficient data can be obtained for these required statistical analyses. This method, however, is inefficient and costly in a real life manufacturing environment.
Therefore, it would be useful and advantageous to provide a means of minimizing tester errors by identifying problems with one of any of a plurality of testers for which a lot of manufactured devices has been split. Such a means would be useful if it could be applied in real-time and if it could produce some qualitative indicator of the tester""s performance.
In general, the present invention provides novel methods and systems for real-time statistical comparison of a plurality of testers testing a randomly divided lot of manufactured articles such as semiconductor wafers.
According to one exemplary embodiment of the invention, disclosed for use in a semiconductor wafer testing environment is a method of statistically comparing yields among two or more testers. The method comprises the step of randomly dividing a produced lot of wafers among the two or more testers. Next, yield statistics are determined for each of the two or more testers as a function of test yields and the number of tests performed on the lot by each tester. Using the yield statistics, a univariate T-statistic for each tester is determined and is used as the basis for comparing each tester with a predetermined threshold statistical range.
According to one aspect of the invention, the method includes the step of taking corrective action with respect to each tester associated with a univariate T-statistic outside the predetermined threshold statistical range.
According to a further aspect of the invention, method steps are taken in order to provide a Type-I error probability of approximately 0.05.
According to yet another embodiment of the invention, a system is disclosed that has multiple testers for independently performing tests and generating test data relating to articles selected from a manufactured lot. One or more computers coupled to the testers have software for determining yield statistics as a function of real-time test data and a count of the tests performed by each tester. The computer and software include capabilities for determining a univariate T-statistic for each tester, and for comparing the univariate T-statistic of each tester with a predetermined threshold statistical range.
According to still another aspect of the invention, the testers of the system are adapted to test a plurality of test dice disposed on semiconductor wafers.
According to another aspect of the invention, the system includes means for taking corrective action with respect to each tester associated with a univariate T-statistic outside the predetermined threshold statistical range.
According to yet another aspect of the invention, the system includes a distributed computer network coupled to the testers.
Further disclosed is a software-based program product with machine readable instructions executable by a computer. The program product can be used in making real-time statistical comparisons of two or more testers used in testing a randomly divided lot of manufactured articles. Included are instructions for maintaining a count of tests performed by each of the testers, and for monitoring test data generated by each of the testers. The instructions also include capabilities for determining yield statistics for each tester as a function of test count and test data. Also included are instructions for calculating a univariate T-statistic for each tester and for comparing each univariate T-statistic with a predetermined threshold statistical confidence level.
According to yet another aspect of the invention, the machine readable instructions include controlling means for taking corrective action with respect to each tester associated with a univariate T-statistic outside the predetermined threshold statistical range.
According to further additional aspects of the invention, the machine readable instructions may reside on magnetic, optical, or electronic storage media.
The invention provides several technical advantages including, but not limited to, enabling a real-time response to statistical analysis and comparison of the performance of a plurality of testers. Thus, the systems and methods of the invention provide substantial savings of time and expense associated with such testing. A further advantage is provided by aspects of the invention which permit the timely recognition of testing errors so that corrective action may be taken while minimizing the potential for Type I errors, or xe2x80x9cfalse alarmsxe2x80x9d, concerning the validity of the testing.